1. Technical Field
This invention relates to the field of electrical interconnects, and in particular to electrical interconnects for high frequency signals.
2. Background Art
The core operating frequencies of microprocessors have been increasing steadily, and it is expected that processors operating in the gigahertz (GHz) frequency regime will soon be available. In order to take full advantage of the speed of these microprocessors, computer systems must be able to couple data to and from the microprocessor core at ever increasing rates. The data transfer rate is typically increased by increasing the frequency at which signals are driven onto the traces that couple data between the processor and associated devices such as memory modules. As this frequency increases, interference effects become significant. In particular, high frequency signals are reflected by variations in the impedance of a trace, degrading the quality of the signal being transmitted. These impedance variations are attributable, in part, to variations in the capacitive coupling between adjacent traces.
Interference is particularly significant in the relatively long signal traces that couple data between, for example, a processor and a memory device on a circuit board. Reference traces are often interposed between the signal traces to reduce the capacitive coupling between signal traces. Reference voltages are provided to the reference traces by one or more voltage planes that are located within the circuit board and coupled to the traces through vias. These vias typically have large diameters relative to the signal and reference traces because it is difficult to manufacture circuit boards with small diameter vias. Relatively large via diameters are employed to improve the yields of circuit boards.
Signal and reference traces are often arrayed in relatively close packed configurations to accommodate timing constraints imposed by high speed signals. To reduce signal transit time, signal lines are routed between devices using the most direct path available. Device sizes are minimized for the same reason. The small device size reduces the spacing between device pads which couple the device to the signal traces. In such closely packed configurations, the relatively large via diameters can obstruct the most direct path between the devices, forcing the signal traces to be routed around the vias. In addition, device pads that couple signal traces to the device(s) intrude into the spacing between signal and reference traces. These factors alter the separation between the signal and reference traces, altering the capacitive coupling between adjacent traces. The resulting variation in the impedance of the signal trace increases the signal degradation due to interference effects.
These impedance variations and the consequent interference arise, for example, with memory devices such as those designed by Rambus Corporation of Mountain View, Calif. In a typical configuration, 100 MHz signals are coupled between a high speed Rambus DRAM (RDRAM) module on a circuit board and a memory controller associated with a processor. The timing constraints, including those imposed by the form factors (size) of the RDRAM cells, require closely arrayed signal and reference traces. The signal traces must be routed around vias and coupled to device pads, altering the trace impedance and generating interference-induced noise on the signal traces.
There is thus a need for a connector that is suitable for coupling high frequency signals on tightly configured signal traces with reduced signal degradation.